Fiz uma entrevista na empresa Synopsys (Bengaluru).
Entrevista
Simple and basic digital electronics questions were asked. Some Questions on verilog and HDL was also included. Basic system verilog and OOPS concepts are necessary. A good understanding of projects presented in the resume is very essential.
Having knowledge of fundamentals of VLSI will be helpful.
Fiz uma entrevista na empresa Synopsys (Ottawa, ON).
Entrevista
It was a smooth process, mostly technical problems, no tricky questions. Mostly asked about previous project on resume, with some coding questions at the end. Total 4hr with 4 different engineer/manager
The interview process consisted of two rounds. The first was a technical screen focusing on Verilog and RTL design. The second was a behavioral interview with the manager. nice processes overview
Candidatei-me por indicação de um funcionário. Fui entrevistado pela Synopsys em mar. de 2025
Entrevista
hard. fifo's n all. and other designing questions. muxes, gates, cdc n all. designing n other implementation questions are their . tough questions were their. U get designing to the best.
Perguntas de entrevista [1]
Pergunta 1
ok. fifo..design n implementation.and other designing questions
