1. How to setup the PLL clock ?

2. How to use asyn and syn fifo ?

3. How to reduce power ?

4. Various techniques that can be used after placement for power reduction .

Question

1.  How to setup the PLL clock ?

2. How to use asyn and syn fifo ?

3. How to reduce power ?

4. Various techniques that can be used after placement for power reduction .

Sigiloso · Accepted Answer

Clock gating, reduce c/f/v, clock domain syn using asyn fifo and use lock effectively for reset.

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