Compare Superscalar and VLIW processors.
Sigiloso
Superscalar is hardware oriented approach towards achieving less than 1 CPI. It basically implements more than 1 instruction pipeline on hardware. It is aware of the dynamic nature of the program execution, for eg. if memory fetch is going on or not etc. This doesn't depend too much on the compiler. VLIW is Very Long Instruction Word, in which multiple (3-4) instructions are clubbed together to form one long instruction (eg 16 bytes instead of 4 bytes in MIPS). This is totally dependent on the compiler as to how it clubs the instructions to form the VLIW. The compiler has to club the instructions which have no inter dependencies. No pipeline hardware overhead, except that decoder becomes a little more complex.