Pergunta de entrevista da empresa Texas Instruments
Design a circuit to divide clock frequency by 2 and by 3
Resposta da entrevista
Sigiloso
11 de dez. de 2020
By 2 - use D F/F By 3 - Design a 3-state FSM that is high for one state to get freq/3 and duty cycle = 1/3.Then use a negative edge-triggered flip-flop with this output as an input and OR both outputs to get a 50% duty cycle