Pergunta de entrevista da empresa Ampere Computing

Introduced myself first. what is metastability? setup time hold time , how to avoid those? How does the threshold voltage and fanout impact setup and hold? Design flow, what all do we need to know to design a code in verilog, Synchronous FIFO, how to design a memory, Cache coherancy and the cache coherance method. how to design a pipeline architecture, what components are present in each stages and how to design those. Hazards and ways to avoid those, Branch prediction techniques, Projects on my resume