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Regarding verification profile, I was about why verification was needed, what is the basic flow, few basic questions in System Verilog, few basic verification concepts such as coverage, randomization, etc. Another round of interview comprised of basic questions on digital logic, such as design of different types of counters, their pros and cons, what is a glitch, setup-and-hole time, etc
Sigiloso
As we had a subject related to System Verilog, I could answer them with ease, along with veficatin concepts. Chris Spear is a good reference book, other tha SV LRM to get the concepts clear related to System Verilog