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Pergunta de entrevista da empresa SanDisk

What is gate induced barrier lowering effect?

Respostas da entrevista

Sigiloso

1 de fev. de 2013

It also can be confused with "Gate-Induced Drain Leakage", wich is different from DIBL. Due to the high e-field on Gate-Drain interface during off-state (with D-S bias), e-h pairs can be formed through tunneling. Each of them goes to the drain or channel and induces drain current. Please see : http://nanohub.org/resources/5690/download/2008.10.28-ece612-l16.pdf

1

Sigiloso

6 de jul. de 2012

I think it should be "Drain induced barrier lowering" which is related to the reduction in the threshold voltage of the transistor due to the large depletion region created by the Drain potential. "

3