If you look at the basic PNP and NPN + 2 resistors circuit-model, most commonly used to represent latchup, you would want to reduce the Rwell and Rsub resistances. Use a good amount of "N-taps" for Nwells and "PTaps" for substrate. Depending on the scenario, you might need guard-rings as well. Generally, guard-rings are used whenever you have a S/D of a big-transistor going to a pad/bump.