Pergunta de entrevista da empresa Marvell Technology

frequency divide by 3 clk circuit

Respostas da entrevista

Sigiloso

6 de out. de 2010

Suppose N=3; duty not 50%: you can use a ring counter, or a Moore FSM; duty 50%, first build a counter 0->2; then generate two enable signals, one active at time n=0, the other active at n=(N+1)/2; apply the two enable signals to two T-FF, the fiest one triggered on posedge, the second one triggered on negedge; the xor the T-FF outputs

2

Sigiloso

20 de set. de 2010

its on the net u can google it out