how to bias a cascode current mirror? how you would layout it?
Sigiloso
- Biasing the gate of the cascode devices with a ratio of 1/5 or 1/6 (W/L) to ensure the lower device stay in saturation. If we have a ratio lower than 1/6, then we are decreasing the minimum Vo for the cascode device. - The 1/5 (W/L) device while having a long channel, its better to layout it with 5 (W/L) transistors connected in series. Why? to decrease the variation of Vt of long channel transistors