Candidatei-me online. O processo levou 2 semanas. Fui entrevistado pela AMD (Bucareste, ) em fev. de 2025
Entrevista
- a technical test and a face-to-face interview
The people who interviewed me were nice and helped me every step of the way. The interview is both knowledge-based and technical.
Outras avaliações de entrevista de vagas de Design Verification Engineer da empresa AMD
campus interview . 2 rounds, basic questions from STA , cmos, digital basics , verilog questions, verilog code for asynchronus d flipflop, blocking and non blocking statements, structure of 3 input OR gate, explain about static and dynamic power
1. HR Screen
2. Technical Round
The whole process was around 2 weeks.
You first get a call from the HR and then will answer questions.
If you are successful, you will book a time for a technical interview.
Perguntas de entrevista [1]
Pergunta 1
Tell me the difference between combinational and sequential logic
I was not well prepared, It was basic q and a related to my current role and some basic OSI questions, Also interviewer was great he gave me time to understand the question and helped me with the hints
Perguntas de entrevista [1]
Pergunta 1
A chip was given which performs (001)addition,(010) subtraction, (011)multiplication and division(100) on 8 bit value, it can store 20 operands at a time in a stack and 2 bits for error handling,
Arth overflow
Stack over
1.Questions was to find out end cases and possible errors and how can we handle it in verilog test benches?.
2. Also, How to write those test cases. ?
