Pergunta de entrevista da empresa NVIDIA
AND & OR gate from 2-1 MUX.
Resposta da entrevista
Sigiloso
5 de set. de 2018
Connect two inputs (A, B) to the MUX (i0, i1, s) such that they behave as AND & OR. Used a 0 for AND gate.
AND & OR gate from 2-1 MUX.
Sigiloso
Connect two inputs (A, B) to the MUX (i0, i1, s) such that they behave as AND & OR. Used a 0 for AND gate.