i applied on ARM's website for the post of formal verification engineer and i receive an email of the manager that showed his interest on my profile after few days we scheduled an interview and i had a phone call of more than 1 hour , mainly technical questions. the manager was very kind and i liked the experience

this is campus interview , starting asking me the reklevant coursework i have in my curriculum and breif intro about them ,like low power vlsi design -what they have taught us and asked about how dynamic,static ,short circuit power dissipation happens in an inverter . ,how to reduce them , power reduction techniques at logic level ,architecture level ,after this gone for verilog , basic bolcking and non blocking ,traffic signal using delay ,projects on digital design using verilog or system verilog