Pergunta de entrevista da empresa NVIDIA
Design OR gate using MUX
Resposta da entrevista
Sigiloso
7 de abr. de 2021
connect select signal of mux to A input and input 0 of mux to value 1'b0 and input 1 of mux to B input
Design OR gate using MUX
Sigiloso
connect select signal of mux to A input and input 0 of mux to value 1'b0 and input 1 of mux to B input