Design a divide by 3 counter. Bonus for 50% duty cycle

Question

moaxgeni · Accepted Answer

I think this is the fastest way to do it.

http://www.onsemi.com/pub_link/Collateral/AND8001-D.PDF

Of course, I would not have been able to just innovate this in the blue in the middle of an interview tough...

Yi Tong · Answer

reg   [2:0] counter1   ;
  reg   [2:0] counter2   ;
  always @ (posedge clk_in)
  if (enable == 1'b0) 
     counter1 <= 3'b001;
  else
     counter1 <= {counter1[1:0],counter1[2]};
  always @ (negedge clk_in)
  if (enable == 1'b0) 
     counter2 <= 3'b001;
  else
     counter2 <= {counter2[1:0],counter2[2]};
     
  assign  clk_out = (counter1[0]|counter2[0]);

Cool · Answer

is dual edge flip flop a kind of cheating?

Mayank Bhatnagar · Answer

Take 3 dual edge flip flops and create a Johnson's counter. The output will be divide by 3 with exactly 50% duty cycle

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