Candidatei-me por meio de uma faculdade ou universidade. O processo levou 3 semanas. Fui entrevistado pela Intel Corporation (Bengaluru) em fev. de 2022
Entrevista
It consists of written test and 3 technical rounds focusing on Physical Design and CMOS and Digital Design Concepts.
Written test focuses on questions from Digital Electronics, Network Theory, Analog Electronics, MOSFET & CMOS, Aptitude
Perguntas de entrevista [1]
Pergunta 1
Explain the ASIC PD flow
What is the metal layer used for power straps and why?
Why do we use Orthogonal Metals in our design?
Is there a problem when we use 2 metals in same direction for 2 consecutive metals?
What is the use of tap cells?
What are spare cells and why are they added in design?
What is Electromigration and how to fix them?
What is latchup and crosstalk and fixes?
What is Crosstalk and how to fix?
How to fix Setup and Hold violation
Fiz uma entrevista na empresa Intel Corporation (Petah Tikva).
Entrevista
very nice people. given 2 question one on system of the group and one for coding in binary search and recursion. we started by little talking and then a little bit on one of the project and then 2 questions
Perguntas de entrevista [1]
Pergunta 1
1. given graph and car with light sensor and we want to find the right spot of the dot on the graph. it was binary search classical
Candidatei-me online. Fui entrevistado pela Intel Corporation (Bengaluru) em mai. de 2026
Entrevista
Deep whiteboard interview , was asked to draw graphs for non ideal characteristics for cmos design and pvt corners. Questions related to project and physical design concepts. Focused on semiconductor physics and technical depth in each answer.
Perguntas de entrevista [1]
Pergunta 1
was asked to draw graphs for non ideal characteristics for cmos design and pvt corners.Questions related to project and physical design concepts. Focused on semiconductor physics and technical depth in each answer.
Fiz uma entrevista na empresa Intel Corporation (Austin, TX).
Entrevista
This was the second round lasted about an hour or so. The first round was mostly about my work as I had 3 year experience and I had to walk them through the projects I did etc..,.
Perguntas de entrevista [1]
Pergunta 1
If the combination logic between 2 FF's is cut like an interface, how do you set_input_delay and set_output_delay for left and right partitions. The clock is the same for both.
