Candidatei-me por meio de uma faculdade ou universidade. Fiz uma entrevista na empresa Juniper Networks.
Entrevista
First a Technical quiz, Aptitude quiz and coding round were conducted on Hackerrank, followed by in-person interviews after the declaration of the results. The first round was damn too easy for me, since I am proficient in STL, but the interview experience wasn't what I had envisioned keeping in view the company's reputation.
Perguntas de entrevista [1]
Pergunta 1
Q: Given a string, generate its next lexicographic permutation.
Q: Convert a link list of bits to an integer.
Q: Merge two std::vector<int>'s and return the resultant vector<int>.
Candidatei-me por meio de uma faculdade ou universidade. O processo levou 1 semana. Fui entrevistado pela Juniper Networks (Vellore) em mar. de 2025
Entrevista
Good experience, Full of computer Networking questions, Operating System, Data Base Management System , Data Structure and Algorithm and projects and object oriented programming questins.
Be thorough with Computer networks
Candidatei-me por meio de uma faculdade ou universidade. O processo levou 1 dia. Fui entrevistado pela Juniper Networks (Collegeville, PA) em out. de 2024
Entrevista
They basically ask you on c++, c and python
we had on campus interview experience. They even asked about networking and sql.Basically it includes everything if u know basics properly u can ace it. If u r from java background and u r focusing on this company then start your c++ journey now
Candidatei-me por meio de uma faculdade ou universidade. Fui entrevistado pela Juniper Networks (Bengaluru) em jun. de 2023
Entrevista
It was on campus process, online interview was taken in 3 rounds, they asked question on digital design, verilog and some aptitude questions was there, HR round was like a chit chat, One of the techinal round was very tough
Perguntas de entrevista [1]
Pergunta 1
Write code for Series shift regester, questions on SRAM etc Medium to Advanced level question on Digital Design, Duty cycle conversion questions, Verilog codes