OT- aptitude, digital, network theory Interview- 3 technical 1 hr Digital, sta, verilog, Finite state machine, test bench, mux related questions, 3 rounds of technical interview, 1 hr round, last round with director, asked about project, all digital verilog and fifo questions, 10110 seq detector, puzzles were there,

Written test followed by technical interview and HR interview. Written test consists of 3 section with 10 questions in each. Each right question gives 1 mark whereas wrong deducts 0.25 mark. Three section consists of aptitude, C programming, and basic engineering questions.